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| Read the most recent BERTScopeeNewsletter
(January 2010) |
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| Browse the BERTScope eNewsletter archives: | |||
| November 2009 #17 |
• | ‘6 Sigma’ Mask Testing white paper | |
| • | eSeminar: Characterizing an SFP+ Transceiver at the 16G Fibre Channel Rate | ||
| • | NEW BERTScope Si 25000C and BERTScope CR 25000A | ||
| • | NEW Option SLD: Stress Live Data with the BERTScope | ||
| • | SuperSpeed USB (3.0) Compliance:
Symbol Filtering software option for BERTScope analyzers Extended Loop Bandwidth option for Clock Recovery |
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| September 2009 #16 |
• | Measurement Brief: D.C. Blocks, a Trap for the Unwary when Using Long Patterns | |
| • | A Trio of Jitter White Papers: BERTScope Jitter Map Comparison Study> Why Do Different Instruments Give Different Jitter Answers? Jitter Map "Under the Hood" – A New Methodology for Jitter Separation |
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| • | DisplayPort Sink and Source Compliance Testing | ||
| • | Webcast: Characterizing an SFP+ Transceiver at the 16G Fibre Channel Rate | ||
| June 2009 #15 |
• | Case Study: Using BERTScope Jitter Map to Troubleshoot a Curious ISI Issue | |
| • | DisplayPort Adds Testing Twists – Article in Test & Measurement World June edition | ||
| • | 14G Clock Recovery for 16x Fibre Channel | ||
| • | Our own YouTube superhero – Jitterman! | ||
| • | Get higher frequency sinusoidal jitter (SJ) for stressed eye testing | ||
| April 2009 #14 |
• | Why Do Different Instruments Give Different Jitter Answers? Application Note | |
| • | Getting the Right Stress at the IC Pins – De-Embedding with BERTScope | ||
| • | Testing an SFP+ Transceiver to the 10 Gigabit Ethernet Electrical Specs | ||
| • | Jitter Map "Under the Hood" – A New Methodology for Jitter Separation | ||
| • | BER-based jitter decomposition – Jitter Map can help, even with PRBS-31 | ||
| • | BERTScope's new DP SINK CTS is the only approved solution for DisplayPort™ CTS 1.1 sink testing | ||
| February
2009 #13 |
• | Testing SFP+ to the 10GbE Electrical Specifications | |
| • | PCI Express 5.0 GT/s Add-In Card Receiver CEM Testing | ||
| • | Measuring PLL Loop Bandwidth Using a BERTScope | ||
| • | ON-DEMAND WEBCAST hosted by EDN • Why Different Instruments Give Different Jitter Answers • Presenter: Charlie Schaffer | ||
| • | Introducing the BERTScope Si 17500C | ||
| • | BER-based jitter decomposition – Jitter Map can help, even with PRBS-31 | ||
| • | BERTScope's solution for DisplayPort CTS 1.1 Sink testing | ||
| • | The BERTScope DPP is a DesignVision Award Winner for 2009 | ||
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December
2008 #12 |
• | White Papers: 10GBASE-KR Compliance Testing | |
| • | Testing an SFP+ Transceiver to the 8x Fibre Channel Specifications, Part I | ||
| • | Testing an SFP+ Transceiver to the 8x Fibre Channel Specifications, Part II | ||
| • | ON-DEMAND WEBCAST hosted by EDN • Demystifying Receiver Jitter Tolerance Testing • Presenter: Steve Sekel | ||
| • | New XSSC Option - Extended SSC and SJ | ||
| • | Comparing DCD and F/2 Jitter – How F/2 differs from classic DCD. | ||
| • | Dual-Dirac, Scope Histograms, and BERTScan Measurements — An introduction to the dual-Dirac method of jitter measurement and how it relates to practical measurements. | ||
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June
2008 #11 |
• | Application Note: Optical Transmitter Jitter Measurement Basics | |
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• |
Application Note: Combating Closed Eyes: Pre-Emphasis and Equalization Basics | ||
| • | Product Note: DCRJ and Omniber OTN 10 Gb/s Telecom Jitter Generation Correlation Study | ||
| • | "Impact of Clock Recovery on Measurements" Webcast by Steve Sekel | ||
| • | Announcing the 4-tap version of the BERTScope DPP Digital Pre-Emphasis Processor | ||
| March 2008 #10 |
• | "Telecom Jitter Analysis Using the BERTScope and BERTScope DCRJ" Product Note | |
| • | "Transmitter Jitter Basics: Two Worlds of Test" Webcast by Charlie Schaffer on communications jitter test method basics | ||
| • | "Impact of Clock Recovery on Measurements" Webcast by Steve Sekel | ||
| • | New BERTScope DPP Digital Pre-Emphasis Processor and BERTScope LTS Lightwave Test Set | ||
| January 2008 #9 |
• | "Telecom Jitter Analysis Using the BERTScope and BERTScope DCRJ" Product Note | |
| • | "Testing the High Speed Electrical Specifications of an XFP Transceiver" White Paper | ||
| • | "10 Gb/s Optical Transmitter Testing" - Product Note | ||
| • | "Transmitter Jitter Basics: Two Worlds of Test" Webcast by Charlie Schaffer on communications jitter test method basics | ||
| • | DisplayPort Source MOI for BERTScope | ||
| December 2007 #8 |
• |
PCI Express® Testing White Papers | |
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• |
"Combating Closed Eyes - Design and Measurement of Pre-Emphasis and Equalization for Lossy Channels" - Webcast by Tom Waschura | ||
| • | "Gigabit Signal Integrity Creates New Challenges" - BestTest Newsletter article | ||
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• |
Serial ATA Interoperability Program Revision 1.2 SyntheSys Research, Inc. MOI for RSG Tests using BERTScope | ||
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"Pass PCI Express® Physical Layer Compliance Testing the First Time" - Webcast by Bent Hessen-Schmidt | ||
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February 2007 #7 |
• | Article published in Lightwave Magazine: "Clock recovery's impact on test and measurement" | |
| • | White paper from Fujitsu Labs: “Integration technologies for pluggable backplane optical interconnect system” | ||
| • | White Paper: "PCI Express® 1.0a and 1.1 Add-In Card Transmitter Testing" | ||
| • | SyntheSys introduces the new 20+ GHz bandwidth BERTScope “B” family of products for testing from 0.1 Gb/s to 12.5 Gb/s | ||
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• |
SyntheSys introduces the BERTScope CRJ clock recovery instrument with jitter analysis capability. | ||
| January 2007 #6 |
• | (DesignCon2007 Special Issue) | |
| • | White Paper: "Clock recovery's impact on test and measurement" | ||
• |
White Paper: "PCI Express® 1.0a and 1.1 Add-In Card Transmitter Testing" | ||
| • | "Serial ATA Interoperability Program Method of Implementation (MOI), Revision 1.1 Version 1.0, for PHY and TSG Device Certification Tests, using the BERTScope by SyntheSys Research, Inc." – December 2006 | ||
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February 2006 #5 |
• | Practical Optical Stress Testing, part 1: 10GbE | |
| • | Practical Optical Stress Testing, part 2: 4x Fibre Channel | ||
| • | White Paper: "Know What You are Really Stress Testing With" | ||
| • | TecPreview at DesignCon2006: "Dual Dirac, Scope Histograms and BERTScan Measurements" | ||
| • | New Golden PLL instrument |
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| • | Frost and Sullivan awards "Most innovative BERT" to BERTScope | ||
| October 2005 #4 |
• | Learn about dual-Dirac jitter measurements. | |
| • | Evaluating Stress Components using BER-Based Jitter Measurements | ||
| • | Updated - Stressed Eye Primer | ||
| • | SyntheSys and JDSU Collaborate on Optical 4x & 8x Fibre Channel and 10G Ethernet Compliance Testing | ||
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June 2005 #3 |
• | The basics of stressed eye jitter tolerance testing. |
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| • | Exploring optical stressed eye compliance testing with JDS-Uniphase. | ||
| • | The effect of pre-emphasis - Example with Altera. | ||
| • | The importance of delay line accuracy in making BERT-Scan measurements. | ||
| • | Compliance Contour - a new way of validating mask testing to low BER levels. | ||
| March 2005 #2 |
• | Integrated stressed eye verifies jitter tolerance compliance of RXs. | |
| • | Our BERTScopes are now available through Electro Rent | ||
| • | "Signal Integrity Compliance Testing" White Paper | ||
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January 2005 #1 |
• | BERTScope is selected a DesignVision Finalist | |
| • | "BERTScope measures Jitter on Live Traffic" - White Paper | ||
| • | "Signal Integrity Compliance Test" - Presentation at DesignCon 2005 | ||
| • | "Anatomy of an Eye Diagram" - White Paper | ||