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Bit Error Rate Measurements

BER

BER is the fundamental measure of system performance. Whether it's coding schemes or ways to use error information to troubleshoot designs, learn more here.

BER Test Setup

Clock Recovery Primer 1  

The Anatomy of Clock Recovery, Part 1

• MARCH 2006

  clock recovery

Clock Recovery Primer 2  

The Anatomy of Clock Recovery, Part 2

• MARCH 2006

  clock recovery

Anatomy of Clock Recovery poster 1  

The Anatomy of Clock Recovery poster, Part 2

Guy Foster • MARCH 2006

  Clock Recovery Part 2

Anatomy of Clock Recovery poster 2  

The Anatomy of Clock Recovery poster, Part 1

Guy Foster • FEB 2006

  Clock Recovery Part 1

Signal Integrity Test paper  

A new signal integrity test and measurement architecture for serial
10 Gb/s interfaces

Tom Lindsay • OCT 2004

 

Eye Contour

BER Testing for SFI-4 paper  

BER Testing for SFI-4 Applications

Jim Dunford • MAY 2002

 

BER Testing for SFI-4

Signal Integrity Compliance paper  

BERTScope-Based Signal Integrity Compliance Testing

Tom Waschura • JAN 2005

 

Signal Integrity Compliance

BER Analysis paper  

Bit Error Rate Analysis and Beyond

Jim Waschura • MAR 2000

 

BER Analysis and beyond

BER Contour paper  

Bridging the Gap - A BER Contour Tutorial

• OCT 2004

 

BER Contour

ECC Design paper  

Digital Channel Error Correction Coding Design Tools

Jim Waschura • SEPT 2001

 

ECC Design

Error Location Analysis tutorial  

Error Location Analysis Tutorial

• MAY 2000

 

Error Location Analysis tutorial

Selecting a BERT paper  

Selecting the Right Bit Error Rate Tester (BERT)

• OCT 2004

 

  logical evolution

Delay Line Accuracy paper  

The Importance of Delay Line Accuracy in Making Direct BERTScan Measurements

• MAY 2005

 

Delay line accuracy

Using BERTs to driver Forward ECC  

Using Bit Error Rate Testers to Drive Forward Error Correction Codes

Tom Waschura • SEPT 2003

 

Error Map

 




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