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How-to Articles |
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Case Study: Using BERTScope Jitter Map to Troubleshoot a
Curious ISI Issue
An interesting signal integrity problem in a Gb/s circuit was successfully identified with
BERTScope Jitter Map. Here we look at the issue, its cause, and explain what was going on.
... Read more |
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DisplayPort Adds Testing
Twists – Article in Test & Measurement World June edition
While it is similar to other serial links, DisplayPort has some unique characteristics.
As with all serial buses, you must test DisplayPort
components and systems for conditions such as jitter and crosstalk to verify an acceptable
BER ... Read more at T&MW |
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What's New at SyntheSys?
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14G Clock Recovery
Working on 16x Fibre Channel? Combine the 17.5 Gb/s BERTScope with the new
CR 14300A
for clock recovery addressing 16x Fibre Channel and other applications
up to 14.3 Gb/s. |
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The media news is not much fun at the moment,
so we decided to lighten the mood a little. Here we present you our own
(highly amateurish) YouTube superhero –
Jitterman! |
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Come and See Us at... |
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PCI-SIG Developers Conference 2009
Santa Clara, California
 July 15 – 16, 2009 |
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PCI-SIG Compliance Workshop #68
Milpitas, California
August 24 – 28, 2009 |
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PCI-SIG Compliance Workshop #69
Taipei, Taiwan
October 12 – 16, 2009 |
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